20371 - RTL Design Engineer

Qualitest is the world’s leading AI-powered Quality Engineering company. 
With 8,000+ experts worldwide and 1,500 in Israel, we partner with top global brands to deliver smarter, faster, and more reliable technology solutions. 
For the fifth year in a row, Qualitest has been recognized as one of Israel’s Top 100 Best Places to Work, reflecting our commitment to a stable, supportive, and growth-oriented workplace. 

Ready to make an impact? We’re hiring a RTL Design Engineer – Israel. 

In this role, you will be responsible for defining, implementing, and optimizing digital logic designs at the Register Transfer Level (RTL) for complex ASIC/SoC systems.

You will work closely with architecture, verification, physical design, and validation teams to deliver high-performance, power-efficient, and functionally robust designs. 

Responsibilities:

• Translate architectural specifications into efficient and synthesizable RTL designs (SystemVerilog).
• Develop detailed microarchitecture specifications for functional blocks or subsystems.
• Integrate IP blocks and ensure seamless connectivity and data flow across the SoC.
• Run design checks (lint, CDC, synthesis readiness) and support backend implementation.
• Collaborate with verification teams to define test plans, review coverage, and debug design issues.
• Support validation and bring-up teams during silicon bring-up and debug phases.
• Optimize designs for power, area, and timing while maintaining functional integrity.

Requirements:

• B.Sc./M.Sc. in Electrical Engineering, Computer Engineering, or related field.
• 3+ years of experience in digital logic or RTL design for ASIC/SoC projects.
• Strong proficiency in SystemVerilog.
• Solid understanding of digital design fundamentals (FSMs, pipelining, arbitration, clock/reset domain handling, etc.).
• Experience with EDA tools for simulation, synthesis, and linting (e.g. Synopsys, Cadence, Mentor).
• Familiarity with low-power design techniques, timing analysis, and interface protocols (e.g., AXI, AMBA, PCIe, DDR).
• Excellent problem-solving skills, attention to detail, and ability to work in a cross-functional environment.
• Experience with SoC-level integration and debug. - Advantage.
• Knowledge of scripting languages (Python, Perl, or Tcl) for automation. - Advantage.
• Exposure to FPGA prototyping or emulation environments. - Advantage.
• Understanding of hardware/software interaction and system-level architecture. - Advantage.