Design Verification Engineer

Date: 30 Oct 2025

Company: Qualitest Group

Country/Region: IN

The main requirement is top notch Verification engineers, and less relevant the specific experience.We can consider a range of years of experience (above 4 years), and again, the main requirement is excellence.Top talent Chip Verification engineers, with range of experience above 4 years: 4-7, 7-10, 10+ yearsExperience in full Chip verification cycle: test planning, verification code writing, tests and RTL debug, verification closure.Experience writing in SystemVerilog/UVM or Specman/E.Preferred: Experience in "Full Chip" verification of large SoC chipsCreating and using verification components and environments in standard verification methodology.Debugging tests with design engineers to deliver functionally correct design blocks